4. Memory organization
There are three memory blocks in each of the PIC16F87X MCUs. The Program Memory and Data Memory have separate buses so that concurrent access can occur and is detailed in this section.
Additional information on device memory may be found in the PICmicro Mid-Range Reference Manual, (DS33023).
4.1. Program memory organization
The PIC16F87X devices have a 13-bit program counter capable of addressing an 8K x 14 program memory space. The PIC16F877/876 devices have 8K x 14 words of FLASH program memory, and the PIC16F873/874 devices have 4K x 14. Accessing a location above the physically implemented address will cause a wraparound.
The
RESET vector is at 0000h and the interrupt vector is at 0004h.
Figure 4.1: PIC16F873 program memory map and stak
4.2. Data memory organization
The data memory is partitioned into multiple banks which contain the General Purpose Registers and the Special Function Registers. Bits RP1 (STATUS<6>) and RP0 (STATUS<5>) are the bank select bits. Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved for the Special Function Registers. Above the Special Function Registers are General Purpose Registers, implemented as static RAM. All implemented banks contain Special Function Registers. Some frequently used Special Function Registers from one bank may be mirrored in another bank for code reduction and quicker access.
RP1:RP0 |
Bank |
00 |
0 |
01 |
1 |
10 |
2 |
11 |
3 |
4.2.1. General purpose register file
The register file can be accessed either directly, or indirectly through the File Select Register (FSR).
-
File Address
File Address
Indirect addr. (*)
00h
Indirect addr. (*)
80h
TMR0
01h
OPTION_REG
81h
PCL
02h
PCL
82h
STATUS
03h
STATUS
83h
FSR
04h
FSR
84h
PORTA
05h
TRISA
85h
PORTB
06h
TRISB
86h
PORTC
07h
TRISC
87h
08h
88h
09h
89h
PCLATH
0Ah
PLATH
8Ah
INTCON
0Bh
INTCON
8Bh
PIR1
0Ch
PIE1
8Ch
PIR2
0Dh
PIE2
8Dh
TMR1L
0Eh
PCON
8Eh
TMR1H
0Fh
8Fh
T1CON
10h
90h
TMR2
11h
SSPCON2
91h
T2CON
12h
PR2
92h
SSPBUF
13h
SSPADD
93h
SSPCON
14h
SSPSTAT
94h
CCPR1L
15h
95h
CCPR1H
16h
96h
CCP1CON
17h
97h
RCSTA
18h
TXSTA
98h
TXREG
19h
SPBRG
99h
RCREG
1Ah
9Ah
CCPR2L
1Bh
9Bh
CCPR2H
1Ch
9Ch
CCP2CON
1Dh
9Dh
ADRESH
1Eh
ADRESL
9Eh
ADCON0
1Fh
ADCON1
9Fh
General
Purpose
Register
96 Bytes
20h
General
Purpose
Register
96 Bytes
A0h
7Fh
FFh
Bank 0
Bank 1
Figure 4.2. PIC16F873 register file map