5 Error Messages and Beep Codes
What This Chapter Contains |
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5.1 |
BIOS Error Messages................................................................................................. |
97 |
5.2 |
Port 80h POST Codes................................................................................................ |
99 |
5.3 |
Bus Initialization Checkpoints ................................................................................... |
103 |
5.4 |
Speaker ................................................................................................................... |
104 |
5.5 |
BIOS Beep Codes .................................................................................................... |
104 |
5.1 BIOS Error Messages
Table 65 lists the error messages and provides a brief description of each.
Table 65. BIOS Error Messages
Error Message
GA20 Error
Pri Master HDD Error
Pri Slave HDD Error
Sec Master HDD Error
Sec Slave HDD Error
Pri Master Drive - ATAPI Incompatible
Pri Slave Drive - ATAPI Incompatible
Sec Master Drive - ATAPI Incompatible
Sec Slave Drive - ATAPI Incompatible
A: Drive Error
Cache Memory Bad
CMOS Battery Low
CMOS Display Type Wrong
CMOS Checksum Bad
CMOS Settings Wrong
CMOS Date/Time Not Set
DMA Error
FDC Failure
HDC Failure
Explanation
An error occurred with Gate A20 when switching to protected mode during the memory test.
Could not read sector from corresponding drive.
Corresponding drive in not an ATAPI device. Run Setup to make sure device is selected correctly.
No response from diskette drive.
An error occurred when testing L2 cache. Cache memory may be bad.
The battery may be losing power. Replace the battery soon.
The display type is different than what has been stored in CMOS. Check Setup to make sure type is correct.
The CMOS checksum is incorrect. CMOS memory may have been corrupted. Run Setup to reset values.
CMOS values are not the same as the last boot. These values have either been corrupted or the battery has failed.
The time and/or date values stored in CMOS are invalid. Run Setup to set correct values.
Error during read/write test of DMA controller.
Error occurred trying to access diskette drive controller.
Error occurred trying to access hard disk controller.
continued
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Intel Desktop Board D845EPI Technical Product Specification
Table 65. BIOS Error Messages (continued)
Error Message
Checking NVRAM.....
Update OK!
Updated Failed
Keyboard Error
Explanation
NVRAM is being checked to see if it is valid.
NVRAM was invalid and has been updated.
NVRAM was invalid but was unable to be updated.
Error in the keyboard connection. Make sure keyboard is connected properly.
KB/Interface Error
Memory Size Decreased
Memory Size Increased
Memory Size Changed
No Boot Device Available
Off Board Parity Error
On Board Parity Error
Parity Error
NVRAM/CMOS/PASSWORD cleared by Jumper
<CTRL_N> Pressed
Keyboard interface test failed.
Memory size has decreased since the last boot. If no memory was removed then memory may be bad.
Memory size has increased since the last boot. If no memory was added there may be a problem with the system.
Memory size has changed since the last boot. If no memory was added or removed then memory may be bad.
System did not find a device to boot.
A parity error occurred on an off-board card. This error is followed by an address.
A parity error occurred in onboard memory. This error is followed by an address.
A parity error occurred in onboard memory at an unknown address.
NVRAM, CMOS, and passwords have been cleared. The system should be powered down and the jumper removed.
CMOS is ignored and NVRAM is cleared. User must enter Setup.
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Error Messages and Beep Codes
5.2 Port 80h POST Codes
During the POST, the BIOS generates diagnostic progress codes (POST-codes) to I/O port 80h. If the POST fails, execution stops and the last POST code generated is left at port 80h. This code is useful for determining the point where an error occurred.
Displaying the POST-codes requires a PCI bus add-in card, often called a POST card. The POST card can decode the port and display the contents on a medium such as a seven-segment display.
NOTE
The POST card must be installed in PCI bus connector 1.
The tables below offer descriptions of the POST codes generated by the BIOS. Table 66 defines the uncompressed INIT code checkpoints, Table 67 describes the boot block recovery code checkpoints, and Table 68 lists the runtime code uncompressed in F000 shadow RAM. Some codes are repeated in the tables because that code applies to more than one operation.
Table 66. Uncompressed INIT Code Checkpoints
Code
D0
D1
D3
D4
D5
D6
D7
D8
D9
Description of POST Operation
NMI is Disabled. Onboard KBC, RTC enabled (if present). Init code Checksum verification starting.
Keyboard controller BAT test, CPU ID saved, and going to 4 GB flat mode.
Do necessary chipset initialization, start memory refresh, and do memory sizing.
Verify base memory.
Init code to be copied to segment 0 and control to be transferred to segment 0.
Control is in segment 0. To check recovery mode and verify main BIOS checksum. If either it is recovery mode or main BIOS checksum is bad, go to check point E0 for recovery else go to check point D7 for giving control to main BIOS.
Find Main BIOS module in ROM image.
Uncompress the main BIOS module.
Copy main BIOS image to F000 shadow RAM and give control to main BIOS in F000 shadow RAM.
Table 67. Boot Block Recovery Code Checkpoints
Code
E0
E8
E9
EA
EB
EC
EF
Description of POST Operation
Onboard Floppy Controller (if any) is initialized. Compressed recovery code is uncompressed in F000:0000 in Shadow RAM and give control to recovery code in F000 Shadow RAM. Initialize interrupt vector tables, initialize system timer, initialize DMA controller and interrupt controller.
Initialize extra (Intel Recovery) Module.
Initialize floppy drive.
Try to boot from floppy. If reading of boot sector is successful, give control to boot sector code.
Booting from floppy failed, look for ATAPI (LS-120, Zip) devices.
Try to boot from ATAPI. If reading of boot sector is successful, give control to boot sector code.
Booting from floppy and ATAPI device failed. Give two beeps. Retry the booting procedure again (go to check point E9).
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Intel Desktop Board D845EPI Technical Product Specification
Table 68. Runtime Code Uncompressed in F000 Shadow RAM
Code
03
05
06
07
08
0B
0C
0E
0F
Description of POST Operation
NMI is Disabled. To check soft reset/power-on.
BIOS stack set. Going to disable cache if any.
POST code to be uncompressed.
CPU init and CPU data area init to be done.
CMOS checksum calculation to be done next.
Any initialization before keyboard BAT to be done next.
KB controller I/B free. To issue the BAT command to keyboard controller.
Any initialization after KB controller BAT to be done next.
Keyboard command byte to be written.
10Going to issue Pin-23,24 blocking/unblocking command.
11Going to check pressing of <INS>, <END> key during power-on.
12To init CMOS if "Init CMOS in every boot" is set or <END> key is pressed. Going to disable DMA and Interrupt controllers.
13Video display is disabled and port-B is initialized. Chipset init about to begin.
148254 timer test about to start.
19 |
About to start memory refresh test. |
1A Memory Refresh line is toggling. Going to check 15 µs ON/OFF time.
23To read 8042 input port and disable Megakey GreenPC feature. Make BIOS code segment writeable.
24To do any setup before Int vector init.
25Interrupt vector initialization to begin. To clear password if necessary.
27
28
2A
2B
2C
2D
2E
2F
Any initialization before setting video mode to be done.
Going for monochrome mode and color mode setting.
Different buses init (system, static, output devices) to start if present. (See Section 5.3 for details of different buses.)
To give control for any setup required before optional video ROM check.
To look for optional video ROM and give control.
To give control to do any processing after video ROM returns control.
If EGA/VGA not found then do display memory R/W test.
EGA/VGA not found. Display memory R/W test about to begin.
30Display memory R/W test passed. About to look for the retrace checking.
31Display memory R/W test or retrace checking failed. To do alternate Display memory R/W test.
32Alternate Display memory R/W test passed. To look for the alternate display retrace checking.
34 |
Video display checking over. Display mode to be set next. |
37Display mode set. Going to display the power-on message.
38Different buses init (input, IPL, general devices) to start if present. (See Section 5.3 for details of different buses.)
39Display different buses initialization error messages. (See Section 5.3 for details of different buses.)
3A |
New cursor position read and saved. To display the Hit <DEL> message. |
continued
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Error Messages and Beep Codes
Table 68. Runtime Code Uncompressed in F000 Shadow RAM (continued)
Code |
Description of POST Operation |
40 |
To prepare the descriptor tables. |
42To enter in virtual mode for memory test.
43To enable interrupts for diagnostics mode.
44To initialize data to check memory wrap around at 0:0.
45Data initialized. Going to check for memory wrap around at 0:0 and finding the total system memory size.
46Memory wrap around test done. Memory size calculation over. About to go for writing patterns to test memory.
47Pattern to be tested written in extended memory. Going to write patterns in base 640k memory.
48Patterns written in base memory. Going to find out amount of memory below 1M memory.
49Amount of memory below 1M found and verified. Going to find out amount of memory above 1M memory.
4B |
Amount of memory above 1M found and verified. Check for soft reset and going to clear memory |
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below 1M for soft reset. (If power on, go to check point # 4Eh). |
4C |
Memory below 1M cleared. (SOFT RESET) Going to clear memory above 1M. |
4D |
Memory above 1M cleared. (SOFT RESET) Going to save the memory size. (Go to check |
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point # 52h). |
4E |
Memory test started. (NOT SOFT RESET) About to display the first 64k memory size. |
4F |
Memory size display started. This will be updated during memory test. Going for sequential and |
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random memory test. |
50Memory testing/initialization below 1M complete. Going to adjust displayed memory size for relocation/shadow.
51Memory size display adjusted due to relocation/ shadow. Memory test above 1M to follow.
52Memory testing/initialization above 1M complete. Going to save memory size information.
53Memory size information is saved. CPU registers are saved. Going to enter in real mode.
54Shutdown successful, CPU in real mode. Going to disable gate A20 line and disable parity/NMI.
57A20 address line, parity/NMI disable successful. Going to adjust memory size depending on relocation/shadow.
58Memory size adjusted for relocation/shadow. Going to clear Hit <DEL> message.
59Hit <DEL> message cleared. <WAIT...> message displayed. About to start DMA and interrupt controller test.
60DMA page register test passed. To do DMA#1 base register test.
62 |
DMA#1 base register test passed. To do DMA#2 base register test. |
65DMA#2 base register test passed. To program DMA unit 1 and 2.
66DMA unit 1 and 2 programming over. To initialize 8259 interrupt controller.
7F |
Extended NMI sources enabling is in progress. |
80Keyboard test started. Clearing output buffer, checking for stuck key, to issue keyboard reset command.
81Keyboard reset error/stuck key found. To issue keyboard controller interface test command.
82Keyboard controller interface test over. To write command byte and init circular buffer.
83Command byte written, global data init done. To check for lock-key.
continued
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Intel Desktop Board D845EPI Technical Product Specification
Table 68. Runtime Code Uncompressed in F000 Shadow RAM (continued)
Code |
Description of POST Operation |
84Lock-key checking over. To check for memory size mismatch with CMOS.
85Memory size check done. To display soft error and check for password or bypass setup.
86Password checked. About to do programming before setup.
87Programming before setup complete. To uncompress SETUP code and execute CMOS setup.
88Returned from CMOS setup program and screen is cleared. About to do programming after setup.
89Programming after setup complete. Going to display power-on screen message.
8B |
First screen message displayed. <WAIT...> message displayed. PS/2 Mouse check and |
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extended BIOS data area allocation to be done. |
8C |
Setup options programming after CMOS setup about to start. |
8D |
Going for hard disk controller reset. |
8F |
Hard disk controller reset done. Floppy setup to be done next. |
91 |
Floppy setup complete. Hard disk setup to be done next. |
95Init of different buses optional ROMs from C800 to start. (See Section 5.3 for details of different buses.)
96Going to do any init before C800 optional ROM control.
97Any init before C800 optional ROM control is over. Optional ROM check and control will be done next.
98Optional ROM control is done. About to give control to do any required processing after optional ROM returns control and enable external cache.
99Any initialization required after optional ROM test over. Going to setup timer data area and printer base address.
9A
9B
9C
9D
9E
A2
A3
A4
A5
A7
A8
A9
AA
AB
AC
AD
Return after setting timer and printer base address. Going to set the RS-232 base address.
Returned after RS-232 base address. Going to do any initialization before Coprocessor test.
Required initialization before Coprocessor is over. Going to initialize the Coprocessor next.
Coprocessor initialized. Going to do any initialization after Coprocessor test.
Initialization after Coprocessor test is complete. Going to check extended keyboard, keyboard ID and num-lock.
Going to display any soft errors.
Soft error display complete. Going to set keyboard typematic rate.
Keyboard typematic rate set. To program memory wait states.
Going to enable parity/NMI.
NMI and parity enabled. Going to do any initialization required before giving control to optional ROM at E000.
Initialization before E000 ROM control over. E000 ROM to get control next.
Returned from E000 ROM control. Going to do any initialization required after E000 optional ROM control.
Initialization after E000 optional ROM control is over. Going to display the system configuration.
Put INT13 module runtime image to shadow.
Generate MP for multiprocessor support (if present).
Put CGA INT10 module (if present) in Shadow.
continued
102