Camenzind_Analog design chips

12 The Phase-Locked Loop

The idea of the phase-locked loop surfaced as early as 1932, but remained an esoteric and expensive concept until the arrival of the integrated circuit. The PLL has the unique ability to capture a signal without requiring precision components, a welcome feature in a world of large variations.

The phase-locked loop is primarily an analog concept and only when we treat it as such can we fathom its powerful capabilities. And here is where simulation fails us. Anyone who has ever sat down at a bench and observed a phase-locked loop grabbing a minute signal seemingly buried in noise will agree that a simulation cannot give you the same sensation. In a real circuit, a phase-locked loop almost seems to be alive, capturing and hanging on to a signal as the frequency is changed; a simulation of the same circuit is a cold experience, giving you no intuition (and taking up an enormous amount of time).

To get a feel for the operation of a phase-locked loop you need to understand the key component, the phase detector. So, let's begin with this.

Camenzind: Designing Analog Chips

VCO input with a frequency

connected to R1 (through M1) and the drain of M6 to R2 (through M4). During the second phase this connection reverses: The drain

current of M5 flows through M2 and R2 and that of M6 through M3 and R1. Thus, ignoring C1 for now, the output across the two load resistors is a

If we shift the VCO waveform a further 90 degrees (still keeping its frequency constant), the VCO wave-form chops the

signal at the zero-crossings again, but now the output is inverted. Averaging it with C1 results in a negative voltage.

Thus, with C1 back in the circuit, we have a DC (or low-frequency) signal at the output of the phase detector which is a measure of the relative phases of the two frequencies. If we use this "error" signal to adjust the frequency of the voltage-controlled oscillator, we have the phase-locked loop (figure 12-5).

The exact same behavior is seen as you approach the VCO frequency from the high end. The capture range (the maximum difference between the two frequencies to achieve lock-on)) is always narrower than the lock range (how far you can drag the VCO and still keep lock). It makes no difference which frequency is moved and which is fixed.

Both the capture range and the lock range are influenced by loop gain and signal level. If you increase the gain of the loop or the input signal level, both ranges become wider.

(Strictly speaking the name phase-locked loop is a misnomer. As you move through the lock range, the two frequencies are locked but their phase relationship has to change to produce the error signal, i.e. the phase is not locked. Frequency-locked loop would be a better name).

The phase-locked loop has three important features, especially for integrated circuits:

1.Apart from the loop gain, the capture range is determined by a single low pass filter. For example, if the signal you are looking for is at 50Mhz and has a narrow band-with (say 5kHz), you dimension the low-pass filter so it rolls off at about 5kHz. This makes the phase-locked loop look like a very sharp band-pass filter. A single-pole low-pass filter rolls off at 20dB per decade, so at 49.9MHz and 50.1MHz the sensitivity of the phaselocked loop to interfering signals is attenuated by 20db. At 49.75Mhz and 50.25Mhz the attenuation is a whopping 80dB. Using an active filter, it would take many poles and a large number of precision components to achieve the same selectivity.

The phase-locked loop depicted in figure 12-5 is a second order PLL (i.e. it has two poles, one by the VCO itself, the other by the low-pass filter). This configuration is unconditionally stable. Adding another pole makes stability (i.e. the absence of unwanted oscillation) more difficult to achieve, but it doubles the sharpness of the filter action.

2.The VCO need not be highly accurate. As long as the freerunning frequency is within the capture range of the signal, the loop will find the exact frequency.

This advantage, however, is made a bit difficult if your capture range is very narrow. In the example above the free-running frequency would have to be within 5kHz of the signal, i.e. 0.1%. Without using accurate components, such precision can only be achieved by tuning, for example by sweeping the VCO over a wider range, detect capture (see below) and then stop the sweep.

3. The error signal (i.e. the output of the low-pass filter) is a measure of frequency deviation. If the input signal is frequency modulated, this output is the demodulated signal.

There is even a simple solution if the modulation is AM, not FM (figure 12-7). In this approach the VCO has a second output (same frequency but shifted 90 degrees) and a second phase detector and low-pass

filter are added.

In the middle of the lock range, the phase shift between the signal and the VCO is automatically 90 degrees, so that the control voltage for the VCO is zero. This means that the signal frequency is chopped at the amplitude peaks. A second phase detector operating at zero degrees phase shift will, therefore, chop the same signal at the zero crossing and the result is a voltage proportional to amplitude. This output then delivers not only the demodulated AM but also indicates that the loop is locked.

How do you design a voltage-controlled oscillator? We have seen some examples in chapter 11, but for most applications VCOs for phaselocked loops are specialized for high-frequency operation. We have two examples here.

Output

Fig. 12-8: Current-controlled oscillator for operation between 6MHz and 300MHz.

The first example is a current-controlled oscillator, though it is a simple matter to convert the current into a voltage.

I1 sets the operating currents for five simple differential amplifiers with active loads. The outputs of each amplifier are connected to the inputs of the next stage and the outputs of the last stage back to the inputs of the first. It is a ring oscillator, relying on the delay caused in each stage. This delay is dependent on the operating current, increasing as the operating current is decreased. With I1=10uA the delay in each stage amounts to 1.6nsec and the frequency is 300Mhz. With I1=0.1uA the delay increases to 83nsec and the frequency decreases to 6MHz. A remarkably large range.

But the delay in each stage is caused by a number of effects, each with its own temperature coefficient. The net result is a variation in temperature coefficient from +800ppm/ oC at 0.1uA to +200ppm/ oC at 10uA. This temperature coefficient can be partially compensated by introducing an opposite tempco into the voltage to current converter, most likely optimized at one operating current only.

Our second example (figure 12-9) uses a different approach. Similar to the 566 oscillator in figure 11-1, a capacitor (C1) is charged and

Fig. 12-9: Voltage-controlled oscillator with a Schmitt Trigger.

discharged by a current. But using two comparators and a flip-flop would be too slow for high-frequency operation. So we employ a Schmitt Trigger, which has fewer devices in sequence and thus reduced delay.

There are two thresholds again. The lower one is 1/2*Vdd and is set by the two equal resistors R5 to R6. When this lower threshold is reached, M21 and M25 turn on. This connects R4 in parallel to R5, which makes the upper threshold 2/3*Vdd. Notice that the resulting triangle waveform at the capacitor has an amplitude of only 1/6*Vdd peak-to-peak; we are trading accuracy for speed.

This is a somewhat improved version of a Schmitt Trigger; the most important factor determining accuracy is the "ON" resistance of M25. If it amounts to a substantial part of the value of R4, the effective resistance will be higher and will have a different temperature coefficient than R5 and R6. To make this "on" resistance small, we should increase the gate width of M25, but we can only do this at the expense of speed. The dimensions chosen for M25 are a compromise.

There is a separate stage (M26) to create a rail-to-rail swing and an inverter (M28, M29) to make both phases available to the phase detector.

The rail-to-rail output of the Schmitt Trigger is also used to switch the capacitor current between charge and discharge (M18, M19). Again, the dimensions chosen here are a compromise. For accuracy over a wide control current range we want them to be large; to get a fast response, they need to be small.

There is a voltage to current converter (M1-M7) and R3 is intended to be an external resistor. The control voltage is derived from Vdd through a resistor divider (R1, R2, R7) with a rest value of 1 Volt, so that the current tracks the two thresholds and the frequency is independent of supply voltage. With no signal at the input, the voltage to current converter produces 100uA. A large-value resistor can be inserted between the two input terminals and the base of M1 modulated with the error signal (thus changing the current by perhaps ±10uA or ±20uA. To adapt the phase detector shown in figure 12-1 to this VCO, an active load can be used, converting the differential error signal to a single-ended one and then bringing it to near ground potential with a current mirror.

With C1=2pF the frequency of oscillation is 36MHz, with a temperature coefficient of -370ppm/oC. At 60MHz (C1=1pF) the temperature coefficient increases to -680ppm/oC because of the greater role played by delay. Below 20MHz the temperature coefficient is close to zero. There is a ± 0.3% change in frequency for a ± 10% change in supply voltage.

The Schmitt Trigger

Otto H. Schmitt was not a German electronics engineer as one would expect. He was born in St. Louis, Missouri in 1913 and studied biophysics and zoology. All through his life he built the electronic equipment he needed for his research himself and became an expert in electronics as well. In 1934 (at age 21) he was engaged in the study of the nervous system and came up with a bistable circuit which mimicked the behavior of a nerve (using vacuum tubes, of course). He never patented it.

The schematic below is a translation of his circuit into MOS devices. With the input low, the gate of M2 is biased high through R1, thus M2 is turned on. The ratio of R2 to R3 sets a bias point at the sources of the two transistors. When the input is moved above this point (plus the threshold voltage of M1), M1 turns on, M2 turns off and the bias voltage is set to a lower level by the ratio of R1 to R3.

Otto Schmitt died in 1998, after a long and productive tenure at the University of Minnesota. Although he is best-known for his "Schmitt Trigger", it represents only a minute fraction of his contributions to science and engineering.

13 Filters

We can go back as far as 100 years and find elaborate electronic filters, using inductors, capacitors and resistors. And the inductor in these combinations has always been the problem child, the largest, heaviest, most expensive and least reliable component. With the advent of integrated circuits its status moved from undesirable to virtually impossible.

There is an intriguing relationship between the inductor and the capacitor; they are direct opposites. As you charge an inductor, the voltage appears first, the current follows later; in a capacitor the current must flow before the voltage can build up. If we build a circuit which shifts the phase 180 degrees, a capacitor has all the appearances of an inductor. It is on this phenomenon that IC filters are based.

Active Filters: Low-Pass

and capacitor values for each stage.

There are schemes for this, worked out mathematically a long time ago, in the era of passive filters. They carry such names as Butterworth, Bessel and Chebyshev.

Second, we can take advantage of active components (such as opamps) and create more compact filter stages. There are many such designs, with names such as Sallen & Key, Multiple Feedback, Fliege, Bach, KHN, or Tow-Thomas.