- •1 Combination Circuits
- •1.1 Circuitry ttl-elements with Shottky diodes
- •Levels of Integration
- •Typical Set of ttl iCs
- •Transistor-transistor logic (ttl)
- •1.2 Element with the open collector Open-collector outputs
- •Tristate outputs
- •1.3 Emitter-coupled logic (ecl)
- •Emitter-coupled multivibrator
- •Emitter-coupled Schmitt trigger
- •1.4 Decoder
- •Priority decoder
- •Binary Decoders
- •Decoder Networks
- •1.5 Coder units Encoder Networks
- •Binary Encoders
- •Priority Encoders
- •1.6 Multiplexers (Selectors)
- •1.7 Multiplexer Trees
- •Demultiplexer Networks
- •Encoder Networks
- •1.8 Demultiplexers (Distributors)
- •1.9 Applicanion of multiplexer
- •1.10 Code converters
- •1.11 Shifters
- •Shifter Networks
- •Barrel Shifter
- •1.12 Comparators
- •Window comparator
- •Digital comparators
- •2 Sequentional Circuits
- •2.1 Circuritry of flips
- •Sequential logic systems
- •Integrated flip-flops
- •Transparent flip-flops
- •Clocked rs flip-flop
- •Clocked d flip-flop
- •Flip-flops with intermediate storage
- •2.2 Flips types Single-edge-triggered flip-flops
- •2.3 Statik registers
- •2.4 Shift register Combinatorial shift register (barrel shifter)
- •Shift Registers
- •2.5 Counters
- •Asynchronous straight binary counter
- •Counters
- •Ripple Counters
- •Asynchronous bcd counter
- •2.6 Synchronous reversal counters
- •Synchronous straight binary counters
- •Synchronous bcd counter
- •Synchronous one-shot
- •Synchronous edge detector
- •Synchronous clock switch
- •2.7 Schmitt flip-flops Schmitt trigger
- •Inverting Schmitt trigger
- •Precision Schmitt trigger
- •3 Memory Devices
- •3.1 Circuitri of memori element Semiconductor memories
- •3.2 Mask-type lic of the rom
- •RaMs as shift registers
- •First-In-First-Out Memories (fifOs)
- •Fifo implementation using standard raMs
- •Error detection and correction
- •Parity bit
- •Hamming code
- •3.3 Rom with singl programming Read-only memories (roMs)
- •Mask-programmed roMs (mroMs)
- •Programmable roMs (proMs)
- •3.4 Memori element with electrical erase Electrically erasable proMs (eeproMs)
- •3.5 Static ram
- •Timing considerations
- •3.6 Dynamic raMs
- •Dynamic ram controllers
- •3.7 Devices programmed
- •Programmable logic array (pal)
Barrel Shifter
An n-bit q-shifter can also be implemented using a barrel-shifter scheme. This scheme is based on the fact that any shift distance s is representable as a sum of shift distances that are powers of 2. That is,
,
where r = log2 q.
Therefore, a network of r stages such that the ith stage shifts a distance of 0 or 2i implements a q-shifter (Figure 1.60.)
The delay of the network is proportional to the number of stages. The comparison between the presented schemes for multimodule shifters is left as an exercise
Fig 1.60 - Barrel shifter.
1.12 Comparators
An operational amplifier without feedback, as in Fig. 1.61, represents the basic circuit of a comparator. Its output voltage is given by
Owing to the high gain, the circuit responds to very small voltage differences U1 - U2. It is thus suitable for the comparison of two voltages, and operates with high accuracy.
Fig. 1.61 - Operational amplifier as Fig. 1.62 - Transfer characteristic.
comparator.
At zero crossing of the input voltage
difference, the output voltage does not immediately
reach the saturation level because the transition is limited by the
slew
rate. For
frequency-compensated standard operational amplifiers it is about
1 V/s.
A rise from – 12 V to + 12 V therefore takes 24 s.
An additional delay is incurred due to the recovery time
needed after the amplifier has been saturated.
Fig. 1.63 - Comparator with logic output. Fig. 1.64 - Transfer characteristic.
y = 1 for U1 >U2
As the amplifier possesses no negative feedback, it also does not require any frequency compensation. Its omission can improve the slew rate and recovery time by a factor of about 20.
Considerably shorter response times can
be attained when using special comparator
amplifiers which are designed for use without feedback and have
especially
small recovery times. However,
the gain and hence the accuracy of the threshold
are somewhat lower than those of operational amplifiers. Usually, the
amplifier output is
directly connected to a level-shift circuit which permits compatible
operation with logic circuits. Its
application and characteristics are shown
in Figs.
1.63
and
1.64
A number of commonly used comparators are listed
in Fig.
1.65.
Fig. 1.65 - Examples of comparators.
Window comparator
A window comparator can determine whether
or not the value of the input voltage
lies between two reference voltage levels. Figure
1.66.shows
that two comparators are used to
decide whether the input voltage is above a lower and
below an upper reference voltage. When
this condition arises, both comparator amplifiers
produce Boolean "one", the and
gate providing the
defined logic evaluation. The
characteristics in Fig.
1.67 illustrate
the operation.
Fig, 1.66 - Window comparator. Fig. 1.67 - Variables as a function of the.
input voltage
y = 1 for U1 <Ui<U2
