Synchronous edge detector

A synchronous edge detector gives an output signal in synchronism with the clock pulse whenever the input variable x has changed. For the implementation of such an arrangement, we consider the one-shot circuit in Fig. 2.62. It produces an output pulse whenever x changes from 0 to 1. In order that a pulse is also obtained at the transition from 1 to 0, the and gate must be replaced by an exclusive-oR gate, producing the circuit in Fig. 2.66. Its characteristics are illustrated by the timing diagram in Fig, 2.67.

Fig. 2.66 - Synchronous edge detector. Fig. 2.67 - Timing diagram.

Synchronous clock switch

The problem often arises of how to switch the clock on and off without interrupting the clock pulse generator. In principle, an and gate could be used for this purpose, but this would result in the first and the last pulse being of undefined length if the switching signal is not clock-synchronized. This effect can be avoided by employing a single-edge triggered D-type flip-flop for the syn­chronization, as is shown in Fig. 2.68. If EN = 1, at the next leading pulse edge Q = 1 and therefore <t>' = 1. The first pulse of the switched clock <t>' always has the full length because of the edge-triggering property.

The leading pulse edge cannot be used to switch off since, directly after the transition, Q = 0, which would result in a very short output pulse. The flip-flop is therefore cleared asynchronously via the reset input when EN and <P are 0, achieved by the nor gate at the R-input. As is obvious from Fig. 2.69, only full-length clock pulses can reach the output of the and gate.

Fig. 2.68 - Synchronous clock switch. Fig. 2.69 - Timing diagram.

2.7 Schmitt flip-flops Schmitt trigger

The Schmitt trigger is a comparator, for which the positive and negative transitions of the output occur at different levels of the input voltage. Their difference is characterized by the hysteresis U_i. As described in earlier sections, Schmitt triggers can be realized by transistors, but in the following section some designs involving comparators are discussed.

Inverting Schmitt trigger

In the Schmitt trigger of Fig. 2.70 the hysteresis is produced by a positive feedback of the comparator, via the voltage divider R₁, R₂. If a large negative voltage U_i is applied, U₀ = U_{0 max}. At the P-input, the potential is then given as

If the input voltage is changed towards positive values, U₀ does not change at first; only when U_i reaches the value V_Pmax, does the output voltage reduce and therefore also V_p. The difference U_D= V_P – V_N becomes negative. Due to the positive feedback, U₀ falls very quickly to the value U_0min. The potential V_P assumes the value

Fig. 2.70 - Inverting Schmitt trigger. Fig. 2.71 - Transfer characteristic.

Switch-on level:

Switch-off level:

Hysteresis:

U_D is negative and large, this resulting in a stable state. The output voltage changes to U_0max only when the input voltage has reached V_Pmin. The corres­ponding transfer characteristic is shown in Fig. 2.71. The circuit has two stable states only if the loop gain

Figure 2.72 shows the output of the Schmitt trigger for a sinusoidal input voltage.

Fig. 2.72 - Voltage waveshapes of the inverting Schmitt trigger.

Non-inverting Schmitt trigger

The input signal for the Schmitt trigger in Fig. 2.70 can also be applied to the low end of the feedback voltage divider when at the same time the input is grounded. The new configuration is the non-inverting Schmitt trigger in Fig. 2.73.

I f a large positive input voltage U_i is applied, U₀ = U_0max . When reducing U_i , U_a does not change until V_P crosses zero. This is the case f the input

Fig. 2.73 - Non-inverting Schmitt. Fig. 2.74.- Transfer characteristic.

Switch-on level:

Switch-off level:

Hysteresis:

voltage

The output voltage jumps to U_omin as soon as U_i reaches or fails below this value. The transition is initiated by U_i but is then determined only by the positive feedback via R₂. The new state is stable until U_i returns to the level

Figure 2.75 depicts the time function of the output voltage for a sinusoidal input. Since, at the instant of transition, V_P = 0, the formulae for the trigger level have the same form as those for the inverting amplifier.

F ig. 2.75 - Voltage waveshapes of the non-inverting Schmitt trigger.