4.2 A/d Data Registers

The DAS BOARD series are 12-bit resolution for analog input channels, the digital data will store in the A/D data registers. The A/D data is put into two 8 bits registers. The low byte data (8 LSBs) are put in address BASE+4 and the high byte data (4 MSBs) are put in address BASE+5. A DRDY bit is used to indicate the status of A/D conversion. DRDY goes to low level means A/D conversion is completed.

Address : BASE + 4 and BASE + 5

Bit	7	6	5	4	3	2	1	0
BASE+4	AD7	ADS	AD5	AD4	AD3	AD2	AD1	AD0
BASE+5	0	0	0	DRDY	AD11	AD10	AD9	AD8

Attribute : read only

Data Format:

AD11 .. ADO : Analog to digital data. AD11 is the Most Significant Bit (MSB). AD0 is the Least Significant Bit(LSB).

DRDY : Data Ready Signal.

1: A/D data is not ready

0: A/D conversion is completed. It will be set to 1, when reading the low byte.

4.3 A/d Channel Multiplexer Register

This register is used to control the A/D channels to be converted. It's a write only register. When the channel number is written to the register, the multiplexer switches to the new channel and await for conversion.

Bit	7	6	5	4	3	2	1	0
BASE+10	X	X	CS1	CS0	CL3	CL2	CL1	CL0

Address : BASE + 10

Attribute: write only

Data Format:

CLn : multiplexer channel number (n=0~3). CL3 is MSB, and CL0 is LSB.

CS0, CS1: Single-ended and Differential Selection

CS0 and CS1 are used to determine which MPC508A chip is selected. The MPC508A is used to multiplex channel from channel, when CS0 is set as 1, the analog input channels from 0 to 7 is selectable, and CS1 is set, the ch8 to ch15 can be selectable. When both CS0 and CS1 are set as 1, it means the analog input is differential mode. The possible analog input channel selections are listed as the table below.

Bit Channel	7 X	6 X	5 CS1	4 CSO	3 CL3	2 CL2	1 CL1	0 CL0
S.E. CH0	X	X	0	1	0	0	0	0
S.E. CH1	X	X	0	1	0	0	0	1
S.E. CH2	X	X	0	1	0	0	1	0
S.E. CH3	X	X	0	1	0	0	1	1
S.E. CH4	X	X	0	1	0	1	0	0
S.E. CH5	X	X	0	1	0	1	0	1
S.E. CH6	X	X	0	1	0	1	1	0
S.E. CH7	X	X	0	1	0	1	1	1
S.E. CH8	X	X	1	0	1	0	0	0
S.E. CH9	X	X	1	0	1	0	0	1
S.E. CH10	X	X	1	0	1	0	1	0
S.E. CH11	X	X	1	0	1	0	1	1
S.E. CH12	X	X	1	0	1	1	0	0
S.E. CH13	X	X	1	0	1	1	0	1
S.E. CH14	X	X	1	0	1	1	1	0
S.E. CH15	X	X	1	0	1	1	1	1
D.I. CH0	X	X	1	1	0	0	0	0
D.I. CH1	X	X	1	1	0	0	0	1
D.I. CH2	X	X	1	1	0	0	1	0
D.I. CH3	X	X	1	1	0	0	1	1
D.I. CH4	X	X	1	1	0	1	0	0
D.I. CH5	X	X	1	1	0	1	0	1
D.I. CH6	X	X	1	1	0	1	1	0
D.I. CH7	X	X	1	1	0	1	1	1

S.E. Single-ended Analog Input

D.I. Differential Analog Input