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4.8 Digital I/o register

There are 16 digital input channels and 16 digital output channels are provided by the ACL-8112. The address Base + 6 and Base + 7 are used for digital input channels, and the address Base + 13 and Base + 14 are used for digital output channels.

Bit

7

6

5

4

3

2

1

0

Base + 6

DI7

DI6

DI5

DI4

DI3

DI2

DI1

DI0

Base + 7

DI15

DI14

DI13

DI12

DI11

DI10

DI9

DI8

Address : BASE + 6 & BASE + 7

Attribute : read only

Data Format:

Bit

7

6

5

4

3

2

1

0

Base+13

DO7

DO6

DO5

DO4

DO3

DO2

DO1

DO0

Base +14

DO15

DO14

DO13

DO12

DO11

DO10

DO9

DO8

Address : BASE + 13 & BASE + 14

Attribute : write only

Data Format:

4.9 D/a Output Register

The D/A converter will convert the D/A output register data to the analog signal. The register data of the address Base + 4 and Base + 5 are used for D/A channel 1, Base +6 and Base +7 are used for D/A channel 2.

Bit

7

6

5

4

3

2

1

0

Base + 4

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

Base + 5

X

X

X

X

DA11

DA10

DA9

DA8

Address : BASE + 4 & BASE + 5

Attribute: write only

Data Format: (for D/A Channel 1)

Bit

7

6

5

4

3

2

1

0

Base + 6

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

Base + 7

X

X

X

X

DA11

DA10

DA9

DA8


Address : BASE + 6 & BASE + 7

Attribute : write only

Data Format: (for D/A Channel 2)

DA0 is the LSB and DA11 is the MSB of the 12 bits data.

X : don't care

Note : The D/A registers are "double buffered" so that the D/A analog output signals will not updated until the second (high) byte is written. This can insure a single step transition when the D/A conversion.

4.10 Internal Timer/Counter Register

Base + 0

Counter 0 Register ( R/W)

Base + 1

Counter 1 Register ( R/W)

Base + 2

Counter 2 Register ( R/W)

Base + 3

8254 CONTROL BYTE

Two counters of 8254 are used for periodically triggering the A/D conversion; the left one is left free for user applications. The 8254 occupies 4 I/O address locations in the DAS BOARD as shown blow. Users can refer to NEC's or Intel's data sheet for a full description of the 8254 features, condensed information is specified in Appendix B.

Address : BASE + 0 ~ BASE + 3

Attribute : read / write

Data Format:

4.11 Low-level Programming

To operate the ACL-8112, users should understand how to write a hardware dependent low-level program. Using either the assembly or the high-level language can perform the low-level programming. In Appendix B, the low-level programming syntax is introduced.

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