- •1. Introduction
- •1.1 Chapter Outline
- •1.2 Server Board Use Disclaimer
- •2. Server Board Overview
- •2.1 Server Board Feature Set
- •2.2 Server Board Layout
- •2.2.1 Server Board Connector and Component Layout
- •2.2.2 Server Board Mechanical Drawings
- •2.2.3 Server Board ATX I/O Layout
- •3. Functional Architecture
- •3.1.1 System Bus Interface
- •3.1.2 Processor Support
- •3.1.2.1 Processor Population Rules
- •3.1.2.2 Common Enabling Kit (CEK) Design Support
- •3.1.3 Memory Subsystem
- •3.1.3.1 Memory RASUM Features
- •3.1.3.2 Supported Memory
- •3.1.3.3 DIMM Population Rules and Supported DIMM Configurations
- •3.1.3.4.1 Mirrored Mode Memory Configuration
- •3.1.3.4.2 Sparing Mode Memory Configuration
- •3.1.3.4.2.1 Single Branch Mode Sparing
- •3.1.3.4.2.2 Dual Branch Mode Sparing
- •3.1.4 Snoop Filter (5000X MCH only)
- •3.2.1 PCI Subsystem
- •3.2.1.3 PE0: One x4 PCI Express* Bus Segment
- •3.2.1.4 PE1: One x4 PCI Express* Bus Segment
- •3.2.1.5 PE2: One x4 PCI Express* Bus Segment
- •3.2.1.6 PE4, PE5: Two x4 PCI Express* Bus Segments
- •3.2.1.7 PE6, PE7: Two x4 PCI Express* Bus Segments
- •3.2.1.8 PCI Express* Riser Slot
- •3.2.2 Serial ATA Support
- •3.2.2.2 Intel® Embedded Server RAID Technology Option ROM
- •3.2.3 Parallel ATA (PATA) Support
- •3.2.4 USB 2.0 Support
- •3.3 Video Support
- •3.3.1 Video Modes
- •3.3.2 Video Memory Interface
- •3.3.3 Dual Video
- •3.4 SAS Controller
- •3.4.1 SAS RAID Support
- •3.4.2 SAS/SATA Connector Sharing
- •3.5 Network Interface Controller (NIC)
- •3.5.2 MAC Address Definition
- •3.6 Super I/O
- •3.6.1 Serial Ports
- •3.6.2 Floppy Disk Controller
- •3.6.3 Keyboard and Mouse Support
- •3.6.5 System Health Support
- •4. Platform Management
- •5. Connector/Header Locations and Pin-outs
- •5.1 Board Connector Information
- •5.2 Power Connectors
- •5.3 System Management Headers
- •5.3.2 LCP/AUX IPMB Header
- •5.3.3 IPMB Header
- •5.3.4 HSBP Header
- •5.3.5 SGPIO Header
- •5.3.7 HDD Activity LED Header
- •5.4 Front Panel Connector
- •5.5 I/O Connectors
- •5.5.1 VGA Connector
- •5.5.2 NIC Connectors
- •5.5.3 IDE Connector
- •5.5.5 SATA/SAS Connectors
- •5.5.6 Serial Port Connectors
- •5.5.7 Keyboard and Mouse Connector
- •5.5.8 USB Connector
- •5.6 Fan Headers
- •6. Jumper Blocks
- •6.1 CMOS Clear and Password Reset Usage Procedure
- •6.1.1 Clearing the CMOS
- •6.1.2 Clearing the Password
- •6.2 BMC Force Update Procedure
- •6.3 BIOS Select Jumper
- •7. Intel® Light-Guided Diagnostics
- •7.2 Fan Fault LEDs
- •7.3 System ID LED and System Status LED
- •7.3.1 System Status LED – BMC Initialization
- •7.4 DIMM Fault LEDs
- •7.5 Processor Fault LEDs
- •7.6 Post Code Diagnostic LEDs
- •8. Design and Environmental Specifications
- •8.3 Server Board Power Requirements
- •8.3.1 Processor Power Support
- •8.4.1 Grounding
- •8.4.2 Standby Outputs
- •8.4.3 Remote Sense
- •8.4.4 Voltage Regulation
- •8.4.5 Dynamic Loading
- •8.4.6 Capacitive Loading
- •8.4.7 Ripple/Noise
- •8.4.8 Timing Requirements
- •8.4.9 Residual Voltage Immunity in Standby Mode
- •9. Regulatory and Certification Information
- •9.1 Product Regulatory Compliance
- •9.1.1 Product Safety Compliance
- •9.1.2 Product EMC Compliance – Class A Compliance
- •9.1.3 Certifications/Registrations/Declarations
- •9.2 Product Regulatory Compliance Markings
- •9.3 Electromagnetic Compatibility Notices
- •9.3.1 FCC Verification Statement (USA)
- •9.3.3 Europe (CE Declaration of Conformity)
- •9.3.4 VCCI (Japan)
- •9.3.5 BSMI (Taiwan)
- •9.3.6 RRL (Korea)
- •9.4 Restriction of Hazardous Substances (RoHS) Compliance
- •Appendix A: Integration and Usage Tips
- •Appendix B: BMC Sensor Tables
- •Appendix C: POST Code Diagnostic LED Decoder
- •Appendix D: POST Code Errors
- •Appendix E: Supported Intel® Server Chassis
- •Glossary
- •Reference Documents
Intel® Server Boards S5000PSL and S5000XSL TPS |
Connector/Header Locations and Pin-outs |
5.Connector/Header Locations and Pin-outs
5.1Board Connector Information
The following section provides detailed information regarding all connectors, headers and jumpers on the server board.
The following table lists all connector types available on the board and the corresponding reference designators printed on the silkscreen:
Table 14. Board Connector Matrix
Connector |
Quantity |
Reference Designators |
Connector Type |
Pin Count |
|
|
|
Main power |
|
Power supply |
4 |
J9B5 |
24 |
|
|
|
J3J2 |
CPU power |
8 |
|
|
J9D1 |
P/S aux/IPMB |
5 |
|
|
J5A2 |
P12V4 power |
4 |
|
|
|
CPU sockets |
|
CPU |
2 |
J8G1, J5G1 |
771 |
|
|
|
|
DIMM sockets |
|
Main memory |
8 |
J7B1, J7B2, J7B3, J8B1, J8B2, J8B3, J9B1, J9B2 |
240 |
|
|
|
|
Card edge |
|
PCI-X |
2 |
J1B2, J2B1 |
|
|
|
|
|
Card edge |
|
PCI Express* x8 |
2 |
J2B2, J3B1 |
|
|
|
|
|
Card edge |
|
PCI Express* x16 |
2 |
J4B2, J4B1 |
|
|
|
|
|
Mezzanine |
|
Intel® RMM |
1 |
J5B1 |
120 |
|
RMM NIC |
1 |
J3B2 |
Mezzanine |
40 |
|
|
|
Key holder |
|
RAID Key |
2 |
J1E1, J1D3 |
3 |
|
|
|
|
Shrouded header |
|
IDE |
1 |
J2J2 |
40 |
|
|
|
|
Header |
|
System fans |
4 |
J3H1, J3H2, J3H3, J3H4 |
6 |
|
|
|
|
Header |
|
System fans |
2 |
J9B3, J9B4 |
4 |
|
|
|
|
Header |
|
CPU fans |
2 |
J9J1, J5J1 |
4 |
|
|
|
|
Battery holder |
|
Battery |
1 |
XBT4D1 |
3 |
|
|
|
|
PS/2, stacked |
|
Keyboard/mouse |
1 |
J9A1 |
12 |
|
|
|
|
External LAN |
|
Stacked |
2 |
JA6A1, JA6A2 |
22 |
|
RJ45/2xUSB |
|
|
built-in magnetic |
|
|
|
|
and dual USB |
|
Stacked |
1 |
J7A1 |
External |
24 |
video/verial port A |
|
|
DSub/DB9 |
|
|
|
|
Header |
|
Serial port B |
1 |
J1B1 |
10 |
|
|
|
|
Header |
|
Front panel |
1 |
J1E4 |
24 |
|
|
|
|
Header |
|
Internal USB |
1 |
J3J1 |
10 |
|
|
|
|
Type A |
|
Internal USB |
1 |
J3G1 |
4 |
|
|
|
|
connector |
|
|
|
|
Header |
|
Chassis Intrusion |
1 |
J1A1 |
2 |
|
|
|
|
Header |
|
Serial ATA/SAS |
6 |
J1G1, J1F2, J1H1, J1G2, J1J1, J1H2 |
7 |
|
|
|
|
Header |
|
HSBP/SGPIO |
4 |
J1J2, J1J7, J2H1, J1J5 |
4 |
|
|
|
|
Header |
|
SES I2C |
1 |
J1J3 |
3 |
|
|
|
|
|
|
Revision 1.7 |
35 |
|
|
|
Intel order number: D41763-008 |
||
|
Connector/Header Locations and Pin-outs |
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
||||
|
|
|
|
|
|
|
|
|
Connector |
Quantity |
|
Reference Designators |
Connector Type |
Pin Count |
|
|
|
|
|
|
Header |
|
|
|
LCP/AUX IPMB |
1 |
J2J1 |
|
4 |
|
|
|
|
|
|
|
Header |
|
|
|
IPMB |
1 |
J4J1 |
|
3 |
|
|
|
|
|
|
|
Header |
|
|
|
HDD Activity |
1 |
J2J3 |
|
2 |
|
|
|
|
|
|
Jumper |
|
|
|
|
Configuration |
4 |
J1D2 (Password Clear), J1D1 (CMOS Clear), J1C3 |
3 |
|
||
|
jumpers |
|
(BIOS Bank Select), J1E3 (BMC Force Update) |
|
|
|
|
|
|
|
|
|
|
|
|
5.2Power Connectors
The main power supply connection uses an SSI-compliant 2x12 pin connector (J9B5). In addition, there are three additional power related connectors:
One SSI-compliant 2x4 pin power connector (J3J2) provides 12 V power to the CPU Voltage Regulators.
One SSI-compliant 1x5 pin connector (J9D1) provides I2C monitoring of the power supply.
One SSI-compliant 2x2 pin connector (J5A2) provides additional 12 V power to the server board.
The following tables define the connector pin-outs:
Table 15. Power Connector Pin-out (J9B5)
Pin |
Signal |
Color |
Pin |
Signal |
Color |
|
|
|
|
|
|
1 |
+3.3 Vdc |
Orange |
13 |
+3.3 Vdc |
Orange |
|
|
|
|
|
|
2 |
+3.3 Vdc |
Orange |
14 |
-12 Vdc |
Blue |
|
|
|
|
|
|
3 |
GND |
Black |
15 |
GND |
Black |
|
|
|
|
|
|
4 |
+5 Vdc |
Red |
16 |
PS_ON# |
Green |
|
|
|
|
|
|
5 |
GND |
Black |
17 |
GND |
Black |
|
|
|
|
|
|
6 |
+5 Vdc |
Red |
18 |
GND |
Black |
|
|
|
|
|
|
7 |
GND |
Black |
19 |
GND |
Black |
|
|
|
|
|
|
8 |
PWR_OK |
Gray |
20 |
RSVD_(-5 V) |
White |
|
|
|
|
|
|
9 |
5 VSB |
Purple |
21 |
+5 Vdc |
Red |
|
|
|
|
|
|
10 |
+12 Vdc |
Yellow |
22 |
+5 Vdc |
Red |
|
|
|
|
|
|
11 |
+12 Vdc |
Yellow |
23 |
+5 Vdc |
Red |
|
|
|
|
|
|
12 |
+3.3 Vdc |
Orange |
24 |
GND |
Black |
|
|
|
|
|
|
36 |
Revision 1.7 |
|
|
|
Intel order number: D41763-008 |
