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Intel® Server Boards S5000PSL and S5000XSL TPS

Appendix C: POST Code Diagnostic LED Decoder

During the system boot process, the BIOS executes a number of platform configuration processes, each of which is assigned a specific hex POST code number. As each configuration routine is started, the BIOS displays the POST code to the POST Code Diagnostic LEDs on the back edge of the server board. To assist in troubleshooting a system hang during the POST process, the Diagnostic LEDs can be used to identify the last POST process that was executed.

Each POST code is represented by a combination of colors from the four LEDs. The LEDs are capable of displaying three colors: green, red, and amber. The POST codes are divided into two nibbles, an upper nibble and a lower nibble. Each bit in the upper nibble is represented by a red LED and each bit in the lower nibble is represented by a green LED. If both bits are set in the upper and lower nibbles, then both red and green LEDs are lit, resulting in an amber color. If both bits are clear, then the LED is off.

A. Status LED

D. Bit 2 LED (POST LED)

B. ID LED

E. Bit 1 LED (POST LED)

C. MSB LED (POST LED)

F. LSB LED (POST LED)

Figure 27. Diagnostic LED Placement Diagram


Revision 1.7	89
	Intel order number: D41763-008

Appendix C: POST Code Diagnostic LED Decoder

Intel® Server Boards S5000PSL and S5000XSL TPS

In the following example, the BIOS sends a value of ACh to the diagnostic LED decoder. The LEDs are decoded as follows:

Red bits = 1010b = Ah

Green bits = 1100b = Ch

Since the red bits correspond to the upper nibble and the green bits correspond to the lower nibble, the two are concatenated as ACh.

Table 51. POST Progress Code LED Example

LEDs

Red

Green

Red

Green

Red

Green

Red

Green

ACh

Result

Amber

Green

Red

Off

MSB

Bit 2

Bit 1

LSB

Table 52. Diagnostic LED POST Code Decoder

			Diagnostic LED Decoder				Description
	Checkpoint		G=Green, R=Red, A=Amber
			MSB	Bit 2	Bit 1	LSB
	Host Processor

		0x10h	Off	Off	Off	R	Power-on initialization of the host processor (bootstrap processor)

		0x11h	Off	Off	Off	A	Host processor cache initialization (including AP)

		0x12h	Off	Off	G	R	Starting application processor initialization

		0x13h	Off	Off	G	A	SMM initialization

	Chipset

		0x21h	Off	Off	R	G	Initializing a chipset component

	Memory

		0x22h	Off	Off	A	Off	Reading configuration data from memory (SPD on DIMM)

		0x23h	Off	Off	A	G	Detecting presence of memory

		0x24h	Off	G	R	Off	Programming timing parameters in the memory controller

		0x25h	Off	G	R	G	Configuring memory parameters in the memory controller

		0x26h	Off	G	A	Off	Optimizing memory controller settings

		0x27h	Off	G	A	G	Initializing memory, such as ECC init

		0x28h	G	Off	R	Off	Testing memory

	PCI Bus

		0x50h	Off	R	Off	R	Enumerating PCI busses

		0x51h	Off	R	Off	A	Allocating resources to PCI busses

		0x52h	Off	R	G	R	Hot-plug PCI controller initialization

		0x53h	Off	R	G	A	Reserved for PCI bus

		0x54h	Off	A	Off	R	Reserved for PCI bus

		0x55h	Off	A	Off	A	Reserved for PCI bus

		0x56h	Off	A	G	R	Reserved for PCI bus

		0x57h	Off	A	G	A	Reserved for PCI bus

	USB


90							Revision 1.7

Intel order number: D41763-008

Intel® Server Boards S5000PSL and S5000XSL TPS						Appendix C: POST Code Diagnostic LED Decoder

	Diagnostic LED Decoder					Description
Checkpoint	G=Green, R=Red, A=Amber
	MSB	Bit 2	Bit 1	LSB
0x58h	G	R	Off	R	Resetting USB bus

0x59h	G	R	Off	A	Reserved for USB devices

ATA/ATAPI/SATA

0x5Ah	G	R	G	R	Resetting PATA/SATA bus and all devices

0x5Bh	G	R	G	A	Reserved for ATA

SMBUS

0x5Ch	G	A	Off	R	Resetting SMBUS

0x5Dh	G	A	Off	A	Reserved for SMBUS

Local Console

0x70h	Off	R	R	R	Resetting the video controller (VGA)

0x71h	Off	R	R	A	Disabling the video controller (VGA)

0x72h	Off	R	A	R	Enabling the video controller (VGA)

Remote Console

0x78h	G	R	R	R	Resetting the console controller

0x79h	G	R	R	A	Disabling the console controller

0x7Ah	G	R	A	R	Enabling the console controller

Keyboard (PS/2 or USB)

0x90h	R	Off	Off	R	Resetting the keyboard

0x91h	R	Off	Off	A	Disabling the keyboard

0x92h	R	Off	G	R	Detecting the presence of the keyboard

0x93h	R	Off	G	A	Enabling the keyboard

0x94h	R	G	Off	R	Clearing keyboard input buffer

0x95h	R	G	Off	A	Instructing keyboard controller to run Self Test (PS/2 only)

Mouse (PS/2 or USB)

0x98h	A	Off	Off	R	Resetting the mouse

0x99h	A	Off	Off	A	Detecting the mouse

0x9Ah	A	Off	G	R	Detecting the presence of mouse

0x9Bh	A	Off	G	A	Enabling the mouse

Fixed Media

0xB0h	R	Off	R	R	Resetting fixed media device

0xB1h	R	Off	R	A	Disabling fixed media device

0xB2h	R	Off	A	R	Detecting presence of a fixed media device (IDE hard drive detection,
	R	Off	A	R	etc.)
					etc.)

0xB3h	R	Off	A	A	Enabling/configuring a fixed media device

Removable Media

0xB8h	A	Off	R	R	Resetting removable media device

0xB9h	A	Off	R	A	Disabling removable media device

0xBAh	A	Off	A	R	Detecting presence of a removable media device (IDE CDROM
	A	Off	A	R	detection, etc.)
					detection, etc.)

0xBCh	A	G	R	R	Enabling/configuring a removable media device

Boot Device	Selection
0xD0	R	R	Off	R	Trying boot device selection


Revision 1.7						91

Intel order number: D41763-008

	Appendix C: POST Code Diagnostic LED Decoder							Intel® Server Boards S5000PSL and S5000XSL TPS

			Diagnostic LED Decoder					Description
	Checkpoint		G=Green, R=Red, A=Amber
			MSB	Bit 2	Bit 1	LSB
		0xD1	R	R	Off	A	Trying boot device selection

		0xD2	R	R	G	R	Trying boot device selection

		0xD3	R	R	G	A	Trying boot device selection

		0xD4	R	A	Off	R	Trying boot device selection

		0xD5	R	A	Off	A	Trying boot device selection

		0xD6	R	A	G	R	Trying boot device selection

		0xD7	R	A	G	A	Trying boot device selection

		0xD8	A	R	Off	R	Trying boot device selection

		0xD9	A	R	Off	A	Trying boot device selection

		0XDA	A	R	G	R	Trying boot device selection

		0xDB	A	R	G	A	Trying boot device selection

		0xDC	A	A	Off	R	Trying boot device selection

		0xDE	A	A	G	R	Trying boot device selection

		0xDF	A	A	G	A	Trying boot device selection

	Pre-EFI Initialization (PEI) Core

		0xE0h	R	R	R	Off	Started dispatching early initialization modules (PEIM)

		0xE2h	R	R	A	Off	Initial memory found, configured, and installed correctly

		0xE1h	R	R	R	G	Reserved for initialization module use (PEIM)

		0xE3h	R	R	A	G	Reserved for initialization module use (PEIM)

	Driver Execution Environment (DXE) Core

		0xE4h	R	A	R	Off	Entered EFI driver execution phase (DXE)

		0xE5h	R	A	R	G	Started dispatching drivers

		0xE6h	R	A	A	Off	Started connecting drivers

	DXE Drivers

		0xE7h	R	A	A	G	Waiting for user input

		0xE8h	A	R	R	Off	Checking password

		0xE9h	A	R	R	G	Entering the BIOS setup

		0xEAh	A	R	A	Off	Flash Update

		0xEEh	A	A	A	Off	Calling Int 19. One beep unless silent boot is enabled.

		0xEFh	A	A	A	G	Unrecoverable boot failure/S3 resume failure

	Runtime Phase/EFI Operating System Boot

		0xF4h	R	A	R	R	Entering Sleep state

		0xF5h	R	A	R	A	Exiting Sleep state

		0xF8h	A	R	R	R	Operating system has requested EFI to close boot services
			A	R	R	R	(ExitBootServices ( ) has been called)
							(ExitBootServices ( ) has been called)
		0xF9h	A	R	R	A	Operating system has switched to virtual address mode
			A	R	R	A	(SetVirtualAddressMap ( ) has been called)
							(SetVirtualAddressMap ( ) has been called)

		0xFAh	A	R	A	R	Operating system has requested the system to reset (ResetSystem ()
			A	R	A	R	has been called)
							has been called)

	Pre-EFI Initialization Module (PEIM)/Recovery

		0x30h	Off	Off	R	R	Crisis recovery has been initiated because of a user request

		0x31h	Off	Off	R	A	Crisis recovery has been initiated by software (corrupt flash)

		0x34h	Off	G	R	R	Loading crisis recovery capsule


92								Revision 1.7

Intel order number: D41763-008

Intel® Server Boards S5000PSL and S5000XSL TPS						Appendix C: POST Code Diagnostic LED Decoder

	Diagnostic LED Decoder					Description
Checkpoint	G=Green, R=Red, A=Amber
	MSB	Bit 2	Bit 1	LSB
0x35h	Off	G	R	A	Handing off control to the crisis recovery capsule

0x3Fh	G	G	A	A	Unable to complete crisis recovery.


Revision 1.7	93
	Intel order number: D41763-008

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