- •1. Introduction
- •1.1 Chapter Outline
- •1.2 Server Board Use Disclaimer
- •2. Server Board Overview
- •2.1 Server Board Feature Set
- •2.2 Server Board Layout
- •2.2.1 Server Board Connector and Component Layout
- •2.2.2 Server Board Mechanical Drawings
- •2.2.3 Server Board ATX I/O Layout
- •3. Functional Architecture
- •3.1.1 System Bus Interface
- •3.1.2 Processor Support
- •3.1.2.1 Processor Population Rules
- •3.1.2.2 Common Enabling Kit (CEK) Design Support
- •3.1.3 Memory Subsystem
- •3.1.3.1 Memory RASUM Features
- •3.1.3.2 Supported Memory
- •3.1.3.3 DIMM Population Rules and Supported DIMM Configurations
- •3.1.3.4.1 Mirrored Mode Memory Configuration
- •3.1.3.4.2 Sparing Mode Memory Configuration
- •3.1.3.4.2.1 Single Branch Mode Sparing
- •3.1.3.4.2.2 Dual Branch Mode Sparing
- •3.1.4 Snoop Filter (5000X MCH only)
- •3.2.1 PCI Subsystem
- •3.2.1.3 PE0: One x4 PCI Express* Bus Segment
- •3.2.1.4 PE1: One x4 PCI Express* Bus Segment
- •3.2.1.5 PE2: One x4 PCI Express* Bus Segment
- •3.2.1.6 PE4, PE5: Two x4 PCI Express* Bus Segments
- •3.2.1.7 PE6, PE7: Two x4 PCI Express* Bus Segments
- •3.2.1.8 PCI Express* Riser Slot
- •3.2.2 Serial ATA Support
- •3.2.2.2 Intel® Embedded Server RAID Technology Option ROM
- •3.2.3 Parallel ATA (PATA) Support
- •3.2.4 USB 2.0 Support
- •3.3 Video Support
- •3.3.1 Video Modes
- •3.3.2 Video Memory Interface
- •3.3.3 Dual Video
- •3.4 SAS Controller
- •3.4.1 SAS RAID Support
- •3.4.2 SAS/SATA Connector Sharing
- •3.5 Network Interface Controller (NIC)
- •3.5.2 MAC Address Definition
- •3.6 Super I/O
- •3.6.1 Serial Ports
- •3.6.2 Floppy Disk Controller
- •3.6.3 Keyboard and Mouse Support
- •3.6.5 System Health Support
- •4. Platform Management
- •5. Connector/Header Locations and Pin-outs
- •5.1 Board Connector Information
- •5.2 Power Connectors
- •5.3 System Management Headers
- •5.3.2 LCP/AUX IPMB Header
- •5.3.3 IPMB Header
- •5.3.4 HSBP Header
- •5.3.5 SGPIO Header
- •5.3.7 HDD Activity LED Header
- •5.4 Front Panel Connector
- •5.5 I/O Connectors
- •5.5.1 VGA Connector
- •5.5.2 NIC Connectors
- •5.5.3 IDE Connector
- •5.5.5 SATA/SAS Connectors
- •5.5.6 Serial Port Connectors
- •5.5.7 Keyboard and Mouse Connector
- •5.5.8 USB Connector
- •5.6 Fan Headers
- •6. Jumper Blocks
- •6.1 CMOS Clear and Password Reset Usage Procedure
- •6.1.1 Clearing the CMOS
- •6.1.2 Clearing the Password
- •6.2 BMC Force Update Procedure
- •6.3 BIOS Select Jumper
- •7. Intel® Light-Guided Diagnostics
- •7.2 Fan Fault LEDs
- •7.3 System ID LED and System Status LED
- •7.3.1 System Status LED – BMC Initialization
- •7.4 DIMM Fault LEDs
- •7.5 Processor Fault LEDs
- •7.6 Post Code Diagnostic LEDs
- •8. Design and Environmental Specifications
- •8.3 Server Board Power Requirements
- •8.3.1 Processor Power Support
- •8.4.1 Grounding
- •8.4.2 Standby Outputs
- •8.4.3 Remote Sense
- •8.4.4 Voltage Regulation
- •8.4.5 Dynamic Loading
- •8.4.6 Capacitive Loading
- •8.4.7 Ripple/Noise
- •8.4.8 Timing Requirements
- •8.4.9 Residual Voltage Immunity in Standby Mode
- •9. Regulatory and Certification Information
- •9.1 Product Regulatory Compliance
- •9.1.1 Product Safety Compliance
- •9.1.2 Product EMC Compliance – Class A Compliance
- •9.1.3 Certifications/Registrations/Declarations
- •9.2 Product Regulatory Compliance Markings
- •9.3 Electromagnetic Compatibility Notices
- •9.3.1 FCC Verification Statement (USA)
- •9.3.3 Europe (CE Declaration of Conformity)
- •9.3.4 VCCI (Japan)
- •9.3.5 BSMI (Taiwan)
- •9.3.6 RRL (Korea)
- •9.4 Restriction of Hazardous Substances (RoHS) Compliance
- •Appendix A: Integration and Usage Tips
- •Appendix B: BMC Sensor Tables
- •Appendix C: POST Code Diagnostic LED Decoder
- •Appendix D: POST Code Errors
- •Appendix E: Supported Intel® Server Chassis
- •Glossary
- •Reference Documents
Appendix A: Integration and Usage Tips |
Intel® Server Boards S5000PSL and S5000XSL TPS |
Appendix A: Integration and Usage Tips
When adding or removing components or peripherals from the server board, AC power must be removed. With AC power plugged into the server board, 5-volt standby is still present even though the server board is powered off.
Processors must be installed in order. CPU 1 is located near the edge of the server board and must be populated to operate the board.
On the back edge of the server board are four diagnostic LEDs that display a sequence of red, green, or amber POST codes during the boot process. If the server board hangs during POST, the LEDs will display the last POST event run before the hang.
Only Fully Buffered DIMMs (FBDIMMs) are supported on this server board. For a list of supported memory for this server board, see the Intel® Server Boards S5000PSL, S5000XSL, S5000XVN, and Server System SC5400RA Tested Memory List.
For a list of Intel supported operating systems, add-in cards, and peripherals for this server board, see the Intel® Server Boards S5000PSL, S5000XSL, S5000XVN, and Server System SC5400RA Tested Hardware and Operating System List.
For a list of Intel supported hard disk drives for this workstation board, see the Intel® Server Board/Systems Tested Hard Drive List.
Only Intel® Xeon® processors with system bus speeds of 667 (Intel® Xeon® processors
5000 series only), 1066, or 1333 MHz are supported on this server board. Previous generation Intel® Xeon® processors are not supported.
For the best performance, the number of FBDIMMs installed should be balanced across both memory branches. For example, a four-DIMM configuration performs better than a two-DIMM configuration. In a four-DIMM configuration, FBDIMMs should be installed in DIMM sockets A1, B1, C1, and D1. An eight-DIMM configuration performs better than a six-DIMM configuration.
The Intel® RMM connector is not compatible with the Intel® Server Management Module Professional Edition (Product Code: AXXIMMPRO) or with the Intel® Server Management Module Advanced Edition (Product Code: AXXIMMADV).
Removing AC power before performing the CMOS Clear operation causes the system to automatically power up and immediately power down after the CMOS Clear procedure is followed and AC power is re-applied. If this happens, remove the AC power cord, wait 30 seconds, and then re-connect the AC power cord. Power up the system and proceed to the <F2> BIOS Setup utility to reset the desired settings.
Normal BMC functionality is disabled with the force BMC update jumper set to the “enabled” position (pins 2-3). The server should never be run with the BMC force update jumper set in this position and should only be used when the standard firmware update process fails. This jumper should remain in the default (disabled) position (pins 1-2) when the server is running normally.
When performing a BIOS update procedure, the BIOS select jumper must be set to its default position (pins 2-3).
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Intel® Server Boards S5000PSL and S5000XSL TPS |
Appendix B: BMC Sensor Tables |
Appendix B: BMC Sensor Tables
This appendix lists the sensor identification numbers and information about the sensor type, name, supported thresholds, assertion and de-assertion information, and a brief description of the sensor purpose. See the Intelligent Platform Management Interface Specification, Version 2.0, for sensor and event/reading-type table information.
Sensor Type
The Sensor Type values are the values enumerated in the Sensor Type Codes table in the IPMI specification. The Sensor Type provides the context in which to interpret the sensor, such as the physical entity or characteristic that is represented by this sensor.
Event/Reading Type
The Event/Reading Type values are from the Event/Reading Type Code Ranges and Generic Event/Reading Type Codes tables in the IPMI specification. Digital sensors are a specific type of discrete sensor, which have only two states.
Event Offset/Triggers
Event Thresholds are event-generating thresholds for threshold types of sensors.
-[u,l][nr,c,nc]: upper nonrecoverable, upper critical, upper non-critical, lower nonrecoverable, lower critical, lower non-critical
-uc, lc: upper critical, lower critical
Event Triggers are supported event-generating offsets for discrete type sensors. The offsets can be found in the Generic Event/Reading Type Codes or Sensor Type Codes tables in the IPMI specification, depending on whether the sensor event/reading type is generic or a sensor-specific response.
Assertion/De-assertion Enables
Assertion and de-assertion indicators reveal the type of events the sensor generates:
-As: Assertions
-De: De-assertion
Readable Value/Offsets
-Readable Value indicates the type of value returned for threshold and other nondiscrete type sensors.
-Readable Offsets indicate the offsets for discrete sensors that are readable with the Get Sensor Reading command. Unless otherwise indicated, all event triggers are readable; Readable Offsets consist of the reading type offsets that do not generate events.
Event Data
Event data is the data that is included in an event message generated by the sensor. For threshold-based sensors, the following abbreviations are used:
-R: Reading value
-T: Threshold value
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Appendix B: BMC Sensor Tables |
Intel® Server Boards S5000PSL and S5000XSL TPS |
Rearm Sensors
The rearm is a request for the event status for a sensor to be rechecked and updated upon a transition between good and bad states. Rearming the sensors can be done manually or automatically. This column indicates the type supported by the sensor. The following abbreviations are used in the comment column to describe a sensor:
-A: Auto-rearm
-M: Manual rearm
Default Hysteresis
The hysteresis setting applies to all thresholds of the sensor. This column provides the count of hysteresis for the sensor, which can be 1 or 2 (positive or negative hysteresis).
Criticality
Criticality is a classification of the severity and nature of the condition. It also controls the behavior of the Control Panel Status LED.
Standby
Some sensors operate on standby power. These sensors may be accessed and/or generate events when the main (system) power is off, but AC power is present.
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Appendix B: BMC Sensor Tables |
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Table 50. BMC Sensors |
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Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
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Name[1] |
Number |
Applica- |
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ding Type |
Triggers |
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ssert |
Value/Offse |
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bility |
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ts |
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Power Unit |
01h |
All |
Power Unit |
Sensor |
Power down |
OK |
As and De |
– |
Trig Offset |
A, I |
X |
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Status |
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09h |
Specific |
Power cycle |
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6Fh |
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A/C lost |
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Soft power control |
Crit |
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failure |
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Power unit failure |
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Power Unit |
02h |
Chassis- |
Power Unit |
Generic |
Fully redundant |
OK |
As and De |
– |
Trig Offset |
A |
X |
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Redun- |
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specific |
09h |
0Bh |
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Redundancy Lost |
Degraded |
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dancy |
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Redundancy |
Degraded |
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degraded |
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Non-redundant: |
Degraded |
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sufficient |
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resources from |
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redundant |
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Non-redundant: |
Degraded |
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sufficient from |
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insufficient |
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Non-redundant: |
Critical |
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insufficient |
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Redundant |
Degraded |
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degrade from full |
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Redundant |
Degraded |
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degrade from non- |
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redundant |
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Watchdog |
03h |
All |
Watchdog 2 |
Sensor |
Timer expired, |
OK |
As |
– |
Trig Offset |
A, I |
X |
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23h |
Specific |
status only |
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6Fh |
Hard reset |
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Power down |
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Power cycle |
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Timer interrupt |
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Revision 1.7 |
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75 |
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Intel order number: D41763-008
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Appendix B: BMC Sensor Tables |
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Intel® Server Boards S5000PSL and S5000XSL TPS |
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Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
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Name[1] |
Number |
Applica- |
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ding Type |
Triggers |
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ssert |
Value/Offse |
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bility |
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ts |
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Platform |
04h |
All |
Platform |
Sensor |
Secure mode |
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OK |
As and De |
– |
Trig Offset |
A, I |
X |
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Security |
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Security |
Specific |
violation attempt |
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Violation |
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Violation |
6Fh |
Out-of-band |
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Attempt |
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access password |
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06h |
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violation |
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Physical |
05h |
Chassis |
Physical |
Sensor |
Chassis intrusion |
OK |
As and De |
– |
Trig Offset |
A |
X |
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Security |
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Intrusion |
Security |
Specific |
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is chassis- |
05h |
6Fh |
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LAN leash lost |
[2] |
Degraded |
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specific |
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FP Diag |
07h |
All |
Critical |
Sensor |
Front panel |
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OK |
As |
– |
Trig Offset |
A, I |
– |
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Interrupt |
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Interrupt |
Specific |
NMI/diagnostic |
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(NMI) |
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13h |
6Fh |
interrupt |
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Bus uncorrectable |
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error |
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System |
09h |
All |
Event |
Sensor |
Log area |
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OK |
As |
– |
Trig Offset |
A, I |
X |
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Event Log |
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Logging |
Specific |
reset/cleared |
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Disabled |
6Fh |
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10h |
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Session |
0Ah |
All |
Session Audit |
Sensor |
00h – Session |
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OK |
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– |
As defined |
A, I |
X |
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Audit |
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2Ah |
Specific |
activation |
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by IPMI |
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6Fh |
01h – Session |
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deactivation |
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System |
0Bh |
All |
System Event |
Sensor |
00 – System |
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OK |
As |
– |
Trig Offset |
A, I |
X |
|
|
|
|
Event |
|
|
12h |
Specific |
reconfigured |
|
|
|
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|
|
|
|
|
('System |
|
|
6Fh |
04 – PEF action |
|
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|
|||
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|
|||||
|
|
Event') |
|
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|
||||
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||
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|
|
BB +1.2V Vtt |
10h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
|
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
|
|
|
|
02h |
01h |
|
|
defined |
|
|
|
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||
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|
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|
|
BB+1.8V |
11h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
|
Threshold |
As and De |
Analog |
R, T |
A, I |
X |
|
|
|
|
NIC Core |
|
|
02h |
01h |
|
|
defined |
|
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||
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|
|
|
BB +1.5V |
12h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
|
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
AUX |
|
|
02h |
01h |
|
|
defined |
|
|
|
|
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||
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|
|
BB +1.5V |
13h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
|
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
|
|
|
|
02h |
01h |
|
|
defined |
|
|
|
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||
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|
|
76 |
|
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
||
Intel order number: D41763-008
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|
|
|
|
Appendix B: BMC Sensor Tables |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
||
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
BB +1.8V |
14h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
||
|
|
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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|
||
|
|
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|
|
|
|
|
|
||
|
BB +3.3V |
15h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
||
|
|
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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|
||
|
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|
|
|
|
|
|
||
|
BB +3.3V |
16h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
X |
|
||
|
STB |
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
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|
|
|
|
|
||
|
BB +1.5V |
17h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
X |
|
||
|
ESB |
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
BB +5V |
18h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
||
|
|
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
BB +1.2V |
19h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
||
|
NIC |
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
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|
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|
|
|
|
|
|
|
||
|
BB +12V |
1Ah |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
||
|
AUX |
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
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|
|
|
|
|
|
|
||
|
BB 0.9V |
1Bh |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
||
|
|
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
BB Vbat |
1Eh |
All |
Voltage |
Digital |
01h – Limit |
Critical |
As and De |
– |
R, T |
A, I |
X |
|
||
|
|
|
|
02h |
Discrete |
exceeded |
|
|
|
|
|
|
|
|
|
|
|
|
|
05h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
BB Temp |
30h |
All |
Temperature |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
X |
|
||
|
|
|
|
01h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Front Panel |
32h |
All |
Temperature |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
X |
|
||
|
Temp |
|
|
01h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
FBDIMM |
48h |
All |
Temperature |
Threshold |
– |
– |
– |
– |
– |
A, I |
– |
|
||
|
Aggregate[3] |
|
|
01h |
01h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
CPU 1 FAN |
50h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
||
|
|
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
CPU 2 FAN |
51h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
||
|
|
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
SYS FAN 1 |
52h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
||
|
TACH |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
|
|
|
|
|
|
|
|
|
77 |
|
|
|
Intel order number: D41763-008
|
|
Appendix B: BMC Sensor Tables |
|
|
|
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
|
|
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SYS FAN 2 |
53h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
|
|
|
TACH |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SYS FAN 3 |
54h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
|
|
|
TACH' |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SYS FAN 4 |
55h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
|
|
|
TACH |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SYS FAN 5 |
56h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
|
|
|
TACH' |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SYS FAN 6 |
57h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
|
|
|
TACH |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Tach Fan |
58h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
|
|
|
(Not used on |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
this server) |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Tach Fan |
59h |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
|
|
|
(Not used on |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
this server) |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
Tach Fan |
5Ah |
Chassis- |
Fan |
Threshold |
[l] [c,nc] [4] |
Threshold |
As and De |
Analog |
R, T |
M, I |
– |
|
|
|
|
(Not used on |
|
specific |
04h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
this server) |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Fan 1 |
60h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
|
|
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Fan 2 |
61h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
|
|
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Fan 3 |
62h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
|
|
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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|
||
|
|
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|
|
|
|
|
|
|
|
|
|
Fan 4 |
63h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
|
|
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Fan 5 |
64h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
|
|
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Fan 6 |
65h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
|
|
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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|
||
|
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|
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|
|
|
|
78 |
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
||
Intel order number: D41763-008
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|
|
|
|
Appendix B: BMC Sensor Tables |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
||
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Fan 7 |
66h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
||
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Fan 8 |
67h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
||
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Fan 9 |
68h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
||
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Fan 10 |
69h |
Chassis- |
Fan |
Generic |
Device present |
OK |
As and De |
– |
T |
A |
– |
|
||
|
Present |
|
specific |
04h |
08h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Fan Redun- |
6Fh |
Chassis- |
Fan |
Generic |
Full redundant |
OK |
As and De |
– |
Trig Offset |
A |
X |
|
||
|
dancy[5] |
|
specific |
04h |
0Bh |
|
|
|
|
|
|
|
|
|
|
|
|
Redundancy lost |
Degraded |
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Redundancy |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
sufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
resources from |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
redundant |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
sufficient from |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
insufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
Non |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
insufficient |
Critical |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Redundant |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
degrade from full |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Redundant |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
degrade from non- |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
redundant |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Power |
70h |
Chassis- |
Power Supply |
Sensor |
Presence |
OK |
As and De |
– |
Trig Offset |
A |
X |
|
||
|
Supply |
|
specific |
08h |
Specific |
|
|
|
|
|
|
|
|
|
|
|
|
Failure |
Degraded |
|
|
|
|
|
|
|
|
||||
|
Status[5] 1 |
|
|
6Fh |
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
Predictive fail |
Degraded |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
A/C lost |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Configuration error |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
|
|
|
|
|
|
|
|
|
79 |
|
|
|
Intel order number: D41763-008
|
|
Appendix B: BMC Sensor Tables |
|
|
|
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
|
|
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
As and De |
– |
Trig Offset |
A |
X |
|
|
|
Power |
71h |
Chassis- |
Power Supply |
Sensor |
Presence |
OK |
|
|
|
|
|
|
|
|
|
Supply |
|
specific |
08h |
Specific |
|
|
|
|
|
|
|
|
|
|
|
|
Failure |
Degraded |
|
|
|
|
|
|
|||||
|
|
Status[5] 2 |
|
|
6Fh |
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
Predictive fail |
Degraded |
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
A/C lost |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Configuration error |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
78h |
Chassis- |
Current |
Threshold |
[u] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
Nozzle |
|
specific |
03h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
Power |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
Supply 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
79h |
Chassis- |
Current |
Threshold |
[u] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
Nozzle |
|
specific |
03h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
Power |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
Supply 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
7Ah |
Chassis- |
Current |
Threshold |
[u] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
Gauge |
|
specific |
03h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
V1 rail |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
(+12V) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Supply 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
7Bh |
Chassis- |
Current |
Threshold |
[u] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
Gauge |
|
specific |
03h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
V1 rail |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
(+12v) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Supply 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
7Ch |
Chassis- |
Other Units |
Threshold |
[u] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
Gauge |
|
specific |
0Bh |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
(aggregate |
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
power) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Supply 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
80 |
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
||
Intel order number: D41763-008
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|
|
|
|
Appendix B: BMC Sensor Tables |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
||
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Power |
7Dh |
Chassis- |
Other Units |
Threshold |
[u] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
||
|
Gauge |
|
specific |
0Bh |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
(aggregate |
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
power) |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Power |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Supply 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
System |
82h |
All |
System ACPI |
Sensor |
S0/G0 |
OK |
As |
– |
Trig Offset |
A, I |
X |
|
||
|
ACPI Power |
|
|
Power State |
Specific |
S1 |
|
|
|
|
|
|
|
|
|
|
State |
|
|
22h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
S3 |
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
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S4 |
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S5/G2 |
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G3 mechanical off |
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||
|
Button |
84h |
All |
Button |
Sensor |
Power button |
OK |
As |
– |
Trig Offset |
A, I |
X |
|
||
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|
14h |
Specific |
Reset button |
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6Fh |
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||
|
SMI Timeout |
85h |
All |
SMI Timeout |
Digital |
01h – State |
Critical |
As and De |
– |
Trig Offset |
A, I |
– |
|
||
|
|
|
|
F3h |
Discrete |
asserted |
|
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03h |
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||
|
Sensor |
86h |
All |
Sensor |
OEM |
I2C device not |
OK |
As |
– |
Trig Offset |
A |
X |
|
||
|
Failure |
|
|
Failure |
Sensor |
found |
|
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F6h |
Specific |
I2C device error |
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73h |
detected |
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I2C bus timeout |
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NMI Signal |
87h |
All |
OEM |
Digital |
01h – State |
OK |
– |
01h |
– |
A, I |
– |
|
||
|
State |
|
|
C0h |
Discrete |
asserted |
|
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03h |
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||
|
SMI Signal |
88h |
All |
OEM |
Digital |
01h – State |
OK |
– |
01h |
– |
A, I |
– |
|
||
|
State |
|
|
C0h |
Discrete |
asserted |
|
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03h |
|
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||
|
Proc 1 |
90h |
All |
Processor |
Sensor |
IERR |
Critical |
As and De |
– |
Trig Offset |
M |
X |
|
||
|
Status |
|
|
07h |
Specific |
|
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|
|
Thermal trip |
Critical |
|
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6Fh |
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Config error |
Critical |
|
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||
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Presence |
OK |
|
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|
|
|
|
Revision 1.7 |
|
|
|
|
|
|
|
|
|
|
81 |
|
|
|
Intel order number: D41763-008
|
|
Appendix B: BMC Sensor Tables |
|
|
|
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|||||||
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|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
|
|
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
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|
|
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|
|
Disabled |
Degraded |
|
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|
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|
|
Proc 2 |
91h |
All |
Processor |
Sensor |
IERR |
Critical |
As and De |
– |
Trig Offset |
M |
X |
|
|
|
|
Status |
|
|
07h |
Specific |
|
|
|
|
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|
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|
|
|
|
Thermal trip |
Critical |
|
|
|
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|
||||
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6Fh |
|
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|||
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|
|
Config error |
Critical |
|
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||
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|
|
Presence |
OK |
|
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|
|
|
|
|
|
|
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|
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|
|
Disabled |
Degraded |
|
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|
|
Proc 1 |
98h |
All |
Temperature |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
Temp[6] |
|
|
01h |
01h |
|
defined |
|
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|
|
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||
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|
|
P1 Therm |
99h |
All |
Temperature |
Threshold |
– |
– |
– |
– |
– |
A, I |
– |
|
|
|
|
Margin[7] |
|
|
01h |
01h |
|
|
|
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||
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|
|
Proc 2 |
9Ah |
All |
Temperature |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A, I |
– |
|
|
|
|
Temp[6] |
|
|
01h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
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||
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|
|
|
|
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|
|
P2 Therm |
9Bh |
All |
Temperature |
Threshold |
– |
– |
– |
– |
– |
A, I |
– |
|
|
|
|
Margin[7] |
|
|
01h |
01h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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||
|
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|
|
|
|
P1B Therm |
9Ch |
All |
Temperature |
Threshold |
– |
– |
– |
– |
– |
A, I |
– |
|
|
|
|
Margin[8] |
|
|
01h |
01h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
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|
||
|
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|
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|
|
|
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|
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|
|
|
|
|
|
P2B Therm |
9Dh |
All |
Temperature |
Threshold |
– |
– |
– |
– |
– |
A, I |
– |
|
|
|
|
Margin[8] |
|
|
01h |
01h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PCIe Link0 |
A0h |
All |
Sensor |
PCIe |
Bus correctable |
OK |
As |
– |
See the |
A, i |
– |
|
|
|
|
|
|
|
|
Specific |
Link0 |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
PCIe Link1 |
A1h |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
|
|
|
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PCIe Link2 |
A2h |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
|
|
|
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
82 |
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
||
Intel order number: D41763-008
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|
|
|
|
Appendix B: BMC Sensor Tables |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
||
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
OK |
As |
– |
See the |
A, I |
– |
|
||
|
PCIe Link3 |
A3h |
All |
Sensor |
Sensor |
Bus correctable |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
Specific |
Specific |
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
PCIe Link4 |
A4h |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
||
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
PCIe Link5 |
A5h |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
||
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
PCIe Link6 |
A6h |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
||
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
PCIe Link7 |
A7h |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
||
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
PCIe Link8 |
A8h |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
||
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
PCIe Link9 |
A9h |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
||
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
PCIe Link10 |
AAh |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
||
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
|
|
|
|
|
|
|
|
|
83 |
|
|
|
Intel order number: D41763-008
|
|
Appendix B: BMC Sensor Tables |
|
|
|
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
|
|
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PCIe Link11 |
ABh |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
|
|
|
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PCIe Link12 |
ACh |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
|
|
|
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
PCIe Link13 |
ADh |
All |
Sensor |
Sensor |
Bus correctable |
OK |
As |
– |
See the |
A, I |
– |
|
|
|
|
|
|
|
|
Specific |
Specific |
error |
|
|
|
BIOS EPS |
|
|
|
|
|
|
|
|
|
6Fh |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Bus uncorrectable |
Degraded |
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
error |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Proc 1 |
C0h |
All |
Temperature |
Threshold |
[u] [c] |
Non- |
As and De |
Analog |
Trig Offset |
M |
– |
|
|
|
|
Thermal |
|
|
01h |
01h |
|
Critical |
|
|
|
|
|
|
|
|
|
Control |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Proc 2 |
C1h |
All |
Temperature |
Threshold |
[u] [c] |
Non- |
As and De |
Analog |
Trig Offset |
M |
– |
|
|
|
|
Thermal |
|
|
01h |
01h |
|
Critical |
|
|
|
|
|
|
|
|
|
Control |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Proc 1 VRD |
C8h |
All |
Temperature |
Digital |
01h – Limit |
Non- |
As and De |
– |
Trig Offset |
M |
– |
|
|
|
|
Over Temp |
|
|
01h |
Discrete |
exceeded |
Critical |
|
|
|
|
|
|
|
|
|
|
|
|
|
05h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Proc 2 VRD |
C9h |
All |
Temperature |
Digital |
01h – Limit |
Non- |
As and De |
– |
Trig Offset |
M |
– |
|
|
|
|
Over Temp |
|
|
01h |
Discrete |
exceeded |
Critical |
|
|
|
|
|
|
|
|
|
|
|
|
|
05h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Proc 1 Vcc |
D0h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A |
– |
|
|
|
|
|
|
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Proc 2 Vcc |
D1h |
All |
Voltage |
Threshold |
[u,l] [c,nc] |
Threshold |
As and De |
Analog |
R, T |
A |
– |
|
|
|
|
|
|
|
|
02h |
01h |
|
defined |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Proc 1 Vcc |
D2h |
All |
Voltage |
Digital |
01h – Limit |
Non- |
As and De |
Discrete |
R, T |
A |
– |
|
|
|
|
Out-of- |
|
|
02h |
Discrete |
exceeded |
Critical |
|
|
|
|
|
|
|
|
|
Range |
|
|
05h |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Proc 2 |
D3h |
All |
Voltage |
Digital |
01h – Limit |
Non- |
As and De |
Discrete |
R, T |
A |
– |
|
|
|
|
Vcc Out-of- |
|
|
02h |
Discrete |
exceeded |
Critical |
|
|
|
|
|
|
|
|
|
Range |
|
|
|
05h |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
84 |
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
||
Intel order number: D41763-008
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|
|
|
|
Appendix B: BMC Sensor Tables |
|
|||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
||
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
CPU |
D8h |
All |
Processor |
Generic |
01h –- State |
Critical |
As and De |
– |
R, T |
A |
– |
|
||
|
Population |
|
|
07h |
03h |
asserted |
|
|
|
|
|
|
|
|
|
|
Error |
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
DIMM A1 |
E0h |
All |
Slot |
Sensor |
Fault status |
Degraded |
As |
– |
Trig Offset |
A |
– |
|
||
|
|
|
|
Connector |
Specific |
asserted |
|
|
|
|
|
|
|
|
|
|
|
|
|
21h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Device installed |
OK |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Disabled |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
DIMM A2 |
E1h |
All |
Slot |
Sensor |
Fault status |
Degraded |
As |
– |
Trig Offset |
A |
– |
|
||
|
|
|
|
Connector |
Specific |
asserted |
|
|
|
|
|
|
|
|
|
|
|
|
|
21h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Device installed |
OK |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Disabled |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
DIMM B1 |
E2h |
All |
Slot |
Sensor |
Fault status |
Degraded |
As |
– |
Trig Offset |
A |
– |
|
||
|
|
|
|
Connector |
Specific |
asserted |
|
|
|
|
|
|
|
|
|
|
|
|
|
21h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Device installed |
OK |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Disabled |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
DIMM B2 |
E3h |
All |
Slot |
Sensor |
Fault status |
Degraded |
As |
– |
Trig Offset |
A |
– |
|
||
|
|
|
|
Connector |
Specific |
asserted |
|
|
|
|
|
|
|
|
|
|
|
|
|
21h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Device installed |
OK |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Disabled |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
DIMM C1 |
E4h |
All |
Slot |
Sensor |
Fault status |
Degraded |
As |
– |
Trig Offset |
A |
– |
|
||
|
|
|
|
Connector |
Specific |
asserted |
|
|
|
|
|
|
|
|
|
|
|
|
|
21h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Device installed |
OK |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Disabled |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
DIMM C2 |
E5h |
All |
Slot |
Sensor |
Fault status |
Degraded |
As |
– |
Trig Offset |
A |
– |
|
||
|
|
|
|
Connector |
Specific |
asserted |
|
|
|
|
|
|
|
|
|
|
|
|
|
21h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Device installed |
OK |
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
|
|
|
|
|
|
|
|
|
|
85 |
|
|
|
Intel order number: D41763-008
|
Appendix B: BMC Sensor Tables |
|
|
|
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Disabled |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
As |
– |
Trig Offset |
A |
– |
|
|
DIMM D1 |
E6h |
All |
Slot |
Sensor |
Fault status |
Degraded |
|
|
|
|
|
|
|
|
|
|
Connector |
Specific |
asserted |
|
|
|
|
|
|
|
|
|
|
|
21h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
Device installed |
OK |
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Disabled |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
DIMM D2 |
E7h |
All |
Slot |
Sensor |
Fault status |
Degraded |
As |
– |
Trig Offset |
A |
– |
|
|
|
|
|
Connector |
Specific |
asserted |
|
|
|
|
|
|
|
|
|
|
|
21h |
6Fh |
Device installed |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Disabled |
Degraded |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
OK |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Memory A |
ECh |
All |
Memory |
Sensor |
Correctable ECC |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
Error |
|
|
0Ch |
Specific |
Uncorrectable |
|
|
|
|
|
|
|
|
|
|
|
|
6Fh |
ECC |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Memory B |
EDh |
All |
Memory |
Sensor |
Correctable ECC |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
Error |
|
|
0Ch |
Specific |
Uncorrectable |
|
|
|
|
|
|
|
|
|
|
|
|
6Fh |
ECC |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Memory C |
EEh |
All |
Memory |
Sensor |
Correctable ECC |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
Error |
|
|
0Ch |
Specific |
Uncorrectable |
|
|
|
|
|
|
|
|
|
|
|
|
6Fh |
ECC |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Memory D |
EFh |
All |
Memory |
Sensor |
Correctable ECC |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
Error |
|
|
0Ch |
Specific |
Uncorrectable |
|
|
|
|
|
|
|
|
|
|
|
|
6Fh |
ECC |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
B0 DIMM |
F0h |
All |
Entity |
Sensor |
Entity present |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
Sparing |
|
|
Presence |
Specific |
|
|
|
|
|
|
|
|
|
Enabled |
|
|
25h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
B0 DIMM |
F1h |
All |
Memory |
Discrete |
Fully redundant |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
86 |
Revision 1.7 |
|
Intel order number: D41763-008
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
|
|
|
|
Appendix B: BMC Sensor Tables |
|
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sparing |
|
|
0Ch |
0Bh |
Non-redundant: |
Degraded |
|
|
|
|
|
|
|
Redun- |
|
|
|
|
sufficient |
|
|
|
|
|
|
|
|
dancy |
|
|
|
|
resources from |
|
|
|
|
|
|
|
|
|
|
|
|
|
redundant |
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
|
|
|
|
|
|
|
|
|
|
|
|
|
sufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources from |
|
|
|
|
|
|
|
|
|
|
|
|
|
insufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
Crtical |
|
|
|
|
|
|
|
|
|
|
|
|
Insufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources |
|
|
|
|
|
|
|
|
B1 DIMM |
F2h |
All |
Entity |
Sensor |
Entity present |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
Sparing |
|
|
Presence |
Specific |
|
|
|
|
|
|
|
|
|
Enabled |
|
|
25h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Fully redundant |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
B1 DIMM |
F3h |
All |
Memory |
Discrete |
|
|
|
|
|
|
|
|
|
Non-redundant: |
Degraded |
|
|
|
|
|
|
|||||
|
Sparing |
|
|
0Ch |
0Bh |
|
|
|
|
|
|
||
|
|
|
sufficient |
|
|
|
|
|
|
|
|||
|
Redun- |
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
resources from |
|
|
|
|
|
|
|
|
|
dancy |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
redundant |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
|
|
|
|
|
|
|
|
|
|
|
|
|
sufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources from |
|
|
|
|
|
|
|
|
|
|
|
|
|
insufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
Crtical |
|
|
|
|
|
|
|
|
|
|
|
|
insufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
B01 DIMM |
F4h |
All |
Entity |
Sensor |
Entity present |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
Mirroring |
|
|
Presence |
Specific |
|
|
|
|
|
|
|
|
|
Enabled |
|
|
25h |
6Fh |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
B01 DIMM |
F5h |
All |
Memory |
Discrete |
Fully redundant |
OK |
As |
– |
Trig Offset |
A |
– |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Revision 1.7 |
87 |
|
Intel order number: D41763-008
|
Appendix B: BMC Sensor Tables |
|
|
|
|
Intel® Server Boards S5000PSL and S5000XSL TPS |
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Sensor |
Sensor |
System |
Sensor Type |
Event/Rea |
Event Offset |
Criticality |
Assert/De-a |
Readable |
Event Data |
Rearm |
Standby |
|
|
Name[1] |
Number |
Applica- |
|
ding Type |
Triggers |
|
ssert |
Value/Offse |
|
|
|
|
|
|
|
bility |
|
|
|
|
|
ts |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Mirroring |
|
|
0Ch |
0Bh |
Non-redundant: |
Degraded |
|
|
|
|
|
|
|
Redun- |
|
|
|
|
sufficient |
|
|
|
|
|
|
|
|
dancy |
|
|
|
|
resources from |
|
|
|
|
|
|
|
|
|
|
|
|
|
redundant |
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
|
|
|
|
|
|
|
|
|
|
|
|
|
sufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources from |
|
|
|
|
|
|
|
|
|
|
|
|
|
insufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Non-redundant: |
Crtical |
|
|
|
|
|
|
|
|
|
|
|
|
insufficient |
|
|
|
|
|
|
|
|
|
|
|
|
|
resources |
|
|
|
|
|
|
|
|
Notes: |
|
|
|
|
|
|
|
|
|
|
|
|
1.Actual sensor name strings in SDR may vary from the names in this table, according to platform-specific usage.
2.Not supported, except for ESB2 embedded NICs.
3.The FBDIMM Aggregate sensor only has effect when CLTT is enabled.
4.For system with redundant cooling capability, the contribution to system status is determined by the fan redundancy sensor.
5.Sensor only presents status on systems that have applicable redundancy (for instance, redundant fan or power supply).
6.Applicable with Intel® Xeon® Processor 5000 series.
7.Applicable with Intel® Xeon® Processor 5100 series and 45-nm 2P Intel® Xeon® Processor.
8.Applicable with Intel® Xeon® Processor 5300 series and 45-nm 2P Intel® Xeon® Processor.
88 |
Revision 1.7 |
|
Intel order number: D41763-008
