Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

GENERAL PURPOSE I/O CONFIGURATION

Figure 5-3 Parallel Port B Pinout

If a pin is configured as a GPIO output and the processor reads the PBD, the processor sees the contents of the PBD rather the logic level on the pin, which allows the PBD to be used as a general purpose 15-bit register. If the processor writes to the PBD, the data is latched there and appears on the pin during the following instruction cycle (see Section 5.2.2 Port B General Purpose I/O Timing).

If a pin is configured as a host pin, the Port B GPIO registers can be used to help in debugging the HI. If the PBDDR bit for a given pin is cleared (configured as an input), the

PBD will show the logic level on the pin, regardless of whether the HI function is using the pin as an input or an output.

If the PBDDR is set (configured as an output) for a given pin that is configured as a host pin, when the processor reads the PBD, it sees the contents of the PBD rather than the logic level on the pin - another case which allows the PBD to act as a general purpose register.

Note: The external host processor should be carefully synchronized to the DSP56002 to assure that the DSP and the external host will properly read status bits transmitted between them. There is more discussion of such port usage considerations in sections Section 5.3.2.7 Host Port Usage Considerations – DSP Side and Section

5.3.6.5Host Port Usage Considerations – Host Side.

5.2.1Programming General Purpose I/O

Port B is a memory-mapped peripheral as are all of the DSP56002 peripherals (see

Figure 5-5). The standard MOVE instruction transfers data between Port B and a register; as a result, MOVE takes two instructions to perform a memory-to-memory data

MOTOROLA PORT B 5 - 5

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Freescale Semiconductor, Inc.

Figure 5-4 Port B I/O Pin Control Logic

transfer and uses a temporary holding register. The MOVEP instruction is specifically designed for I/O data transfer as shown in Figure 5-6. Although the MOVEP instruction may take twice as long to execute as a MOVE instruction, only one MOVEP is required for a memory-to-memory data transfer, and MOVEP does not use a temporary register. Using the MOVEP instruction allows a fast interrupt to move data to/from a peripheral to memory and execute one other instruction or move the data to an absolute address. MOVEP is the only memory-to-memory move instruction; however, one of the operands must be in the top 64 locations of either X: or Y: memory.

The bit-oriented instructions that use I/O short addressing (BCHG, BCLR, BSET, BTST, JCLR, JSCLR, JSET, and JSSET) can also be used to address individual bits for faster

I/O processing. The digital signal processor (DSP) does not have a hardware data strobe to strobe data out of the GPIO port. If a strobe is needed, it can be implemented using software to toggle one of the GPIO pins.

5 - 6 PORT B MOTOROLA

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Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.

GENERAL PURPOSE I/O CONFIGURATION

= Read as random number; write as don’t care.

Figure 5-5 On-Chip Peripheral Memory Map

MOTOROLA PORT B 5 - 7

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